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Schematic Draw

1.  Make a new Project

     Progeam Excute/Protel99se, File new, Set Working Directory and folders.

2.  Draw Schematic

     File/New/Schematic Document, click and give it the name , will be shown in Documents Directory

3.  Schematic Library Generation, Single symbol, Separated Symbol for One component.

     File/New/Schematic Library Document, click and do Rename

     on the *.lib File Menu, Tools/New component select, draw library and rename, Place the Schematic Page.

     need to change, edit library ,and then update schematic.

     Description, Default Designator ?U/?C/?R..., Description.., Footprint1,2...

     Library Field Generation: Part Descriptio, Value, .., Part Field Names: Part No, Manufacture, Price, Contact Info......

     and then BOM Data has all part information after all part information is insert in schematic.

     Multi Part Library, New Component/Part 1/1(One part), pushe Add component part icon to make part number.

     If 4 part, it will be 4/4 in part button. Draw each part in after changing 1/4, 2/4, 3/4 4/4

     Pin Attribute(Show Name : Unchecked, Show Number : Checked Box, )

     HiddenPins Checked and Add Power, GND , and others Pins.

     after Hidden Pins Unchecked , Hiddend attribute pins are disapper. Select all 1/4 and copy and past to 2/4,3/4,4/4

     and edit pin number and name(even hidden attribute).  Report/Component Rule Check

     Browse Sch Window, Libraries(Especially, PROTEL Dos libraries,Sim Libraries, Miscellaneous device)),

     Copy and Paste it to my library file      for new library Group to easily graphic draw.

     Place part, Right click(Preference, Change Snap Grid to under 10)

4.  Wiring.., Zooming (Page UP/DOWN), Zoom All View("Z"+"A")

     BUS Array, Select 1 wire and net name and Cut,  Edit/Paste Array, Array Bus wire and Net Draw and Bus Entry

     Tab Key, All part attribute change, Select "VCC","GND" Types and Shapes

     No use pins are marked by  "NOERC" on the left side icon

5.  Multi Hierarchy ( Different Sheets with Ports, ), DownHierarchy icon button to find the ports.

     Design/Create symbol from sheet(Vertical Several Sheets). Reverse..., Yes Click to put all sub schematics into

     top schematic directory.  Net Label and Port Global (Simple One Sheet)

6.  Part Sequence Numbering

     Design/Annotate .options(?parts).select Several directions.

     For Editing, Edit/Spread Sheet, Schematic Export Wizard, Part(Only On), Description/Designator/Footprint(On)

     File/Update, all part configuration update in schematics

7.  Design/ERC..

8 . Netlist Creation

      Design/Create Netlist.. Output Format(Protel), Sheet symbol / Port Connection(Net Identifier Scope)

      For Multi Sheets, Net Labels and Ports Global, Active Project,   

      in PCB Document, Open *.net file with design/Load net, design/update schematic(if changes in PCB).

9.  PCB Send, Design/Update PCB..Sheet Symbol/Port Connections..Preview Changes, Only Show Errors(Report),

      Excute(Synchronization)

      PCB Document,  Right button, Fit Board(Each Layer Definition - Room Definition for part placemnet) for the two layer

      Delete the Room(Layer) Definition.

      Cross Probe icon Button, all components check in PCB, Schematic Documents

10. Importing Folders,Projects od Orcad, PCAD....

11. Title Box

      Open C:\Program Files/DXP..../SYSTEM/TEPLATES/Schematic Templates/A4.Dot and Edit them

      User Title Box , Graphical Draw with Lines, Not Wire which has a electrical attribute.

      Fix Texts are written down with Tex, Changed Text is made by Text Attribute.

      Title(normal Text) .Title  .Organization, Address, .Desiner Name, Selection and

      Changed Text Size and Color ...

      Log insertion , Plcae/Drwing Tool/Graphic/Company-logo.jpg...(Unchecked 1:1 Size control) with right button click.

      Document options, snap grid change for comfort drawings. and Save,

      Select, Design/Template/Set template Type/ Browse ...c:\Program Files/Design../A4.dot.

      Input company Info. in Design/Options/organization or Right Click and Document Options/Organization, address, Title..  

      Check Box,Tools/Preference/Graphic Editing/Convert Special Strings, and all information update.

PCB Design

1. Document/Right Click, File/New/PCB Document, Rename

2. Basic Setting For PCB Design

    - Grid Set : Design/Options, Visible Grid1, Grid2 : ex) 10Mil(Grid1), 100Mil(Grid2), 10 Division

    - Keepout Layer : Board Outline, Dimension with Interactive Route Connection

      "J", "L" : Jump to Location to draw Board Outline, Keyboard enter 2 times

3. Library Generation

    - Browse PCB Window, Browse : Library Add/Remove, "ADVPCB.Lib"

    - Document/New/PCB library Document, Edit/Set Reference/Origin set

    - Tools/ New Component/Component Wizards, Package Type, Set Unit(mm or Mil), Pad Dimension,

       Pitch(Horizon, Vertical), Pad Type, and Number, Footprint Name.

       Manual Draw, Document Options/ Options/ Snap Grid,component x,y, Pad attribute set with Tap key

      and ArrayPin , Edit/Paste Array,Item Count(Total Pin), Increase No of Pin,  X,Y Spacing(Pitch),

       Jump to Location Command for small Pad Draw with out array and wizard.

       "G" key is for snap grid set. rename the pcb library

4. Layer Definition(Multi Layer, Mechanical Layers..)

    - Design/Option/Layers, Used Layers Check

    - Design/Layer stack Manager/ Top,Bottom Check, After Top LAyer Click, Add layer, Power Layer-> Add Plane

      Internal Layer Double Click, Assign VCC,GND.

    - Design/Split Planes/ Set Internal Plane 1(VCC), 2(GND), automatically VCC, GND Pattern are connect internal PlAne.

   -  Set Mechanical, 1 -> Board , 2-> Dimensio in  Design/Mechanical Layer , Make sure the generated Mechanical Layer in

      Click Right/Document Options

5. Design Rule( 이격거리 설정)

   - Design/Design Rules/Routing, Clearance Constraint, Topology, Via Stayle,

   - Set Clearance Constraint, 10Mil(Board to Board, aDD/eDIT rULE, ALL -> NET(Filter Kind), VCC(VCC), SET Clearance(간격), 20Mil

   - Set Routing Layer, Double Click

      Basic 2 layer set : Top Layer(Horizontal), Bottom(Vertical)

      Basic 1 layer set : Top Layer(not used), Bottom(Any).

   - Width Constarint Routing Wire Width set.Add/Net, select VCC, Rule

   - Manufacturing/polygone connect style/2,4 Connect type ,Width setting

   - Manufacturing/Power Planeconnect style Rule, Direct connect, Relief connect type settings.  

6. Placement

    - Draw Board Outline: Layer(Board Outline, Routing Button, Draw move to Location. "J"+"L")

    - Component Arrange to Board Arround: Edit/Select All/Tools/Interactive Placemnet/Arrange Outside Board, unselect

    - 검은 바탕 화면에서 Click하면 Choose Component window에서 부품을 찾아 배치함.

    - Tool/preference/Set component placement angle

      arrange Components in array(윈도우 우측의 아이콘에 정렬 기능 이용하여 가지런히 정렬 가능)

   -  Move & Mirror : "x","y"(Lotation x,y axis),  "L"(Bottom LAyer palcement)

  -   Tools/Auto Placement/ Auto Placer, After setting the Origin of the Board

7. Routing

   - "*" key : Top and Bottom Move with auto Via generation, with "G" Key  Set and Change the routing Grid

   - "RIGHT Click", Interactive Routing, Routing route angle change with Space Bar, Trace Rule(Edit width) in Tab Key

     "Menu Button" in Interactive Routing Window, Change the trace width if need.

   -  Auto route/setup/Auto Router setup. All pre-route(with space), Edit pattern, new trace , remove old trace automatically.

  -   Silkname remove Component click -> Global -> Remove the Deginator

8. Drop Pad

    Edit/select/all and then Tools/Tear drop/ "All pad", action "add", (Remove), "Arc", OK

    "Select Object Only" Tear Drop.   

9. Create Polygone(Copper)

   - If Pattern 10Mil, 부품 Land를 GND 와 분리가 필요한 경우, NEED A Bigger clearance from the GND Copper,

     Design/Design Rule/ All-Object Kind "AIA,TRACK, FILLS, KEEPOUT, "SMD", Thruholoe", "Polygone", Maximum Clearance : 20Mil

  - Place/Polygone Plane/ GND Net, Grid, Track width 같은 사이즈로 할 것., Top/Bottom Layer 설정

    GND PATTERN이 없는 부분에 cOPPER는 제거 : Remove Dead Copper

  - Edit the GND Polygone shape, Edit/Move/Polygone Vertics, Mover the outline, Another way: Place/Keepout/Track, Reset Error Mark,

    Right Clikc/Options/Display/ShowHide/Polygone, Draft,  Design/Rule/DRC,Online/ALL OFF FROM for Hiding all DRC Errors.

10. Internal Layer Polygone 처리하기

   - Internal (음각 설계) Layer, Layer stack Manger/ sig1,sig2 for internal alyer 1.4Mil Thickness, "E" + "D" edit, delete.

      Place/Polygone Plane/ 각 4각 모퉁이를 잡고 Polygone을 쒸움. 음각이나 양각이 차이는 내층 VCC,GND를 PAD와 연결하는 방법에 대한 내용임.

11.Cam Data generation

  - File/CAM Manager/Gerber,Gerber name, Unit(mm), 4:2, Menu (Plot LAYER, USED), YES,YES GRAPHIC SYSMBOL, Mechanicla LAyer, Yes(Board)

    Edit/insert Gerber... Right Click/Insert Gerber...

    Edit/Insert NCDRILL, or Tools/CAM Wizards/NC Drills/Name, Unit(mm)

    Tools/Preference/Export to copy to "해당 디렉토리 Path 설정"

    Tools/Generate CAM Files/, *.apr,drl,gbl,gbs,gd1,gg1,gk0,gpb,gpt,gtl,gt0,gts,rep,txt

    Empty PCB Document  , File-> Import > Gerber batch file,*.gbl (g로 시작하는 확장자 아무거나  선택), 드릴정보는 없으므로 비교시 착오없으시길..

    Right Click/Option/Display/Single Layer Mode..로 한Layer씩 비교하며 check 할 수 있음. Split windows

    Right Click/Option/Board Layer에서 Used On 하면 사용한 Layer만 볼 수 도 있음.( 한 Layer씩 On/Off 하면서 눈으로 확인 가능)

    Compress all  files, send to CAM Company

12. Printing

   -All layer print in One page or each layer

   - File /Print preview/Whole Boar one page(1:1프린터가 아닌 확대해서 페이지에 맞게 프린터) Standard Print(1:1) 프��트 가능, PCB screen Region(일정 부분만 프린터)

   - Tools/Create final/각각의 Layer별로 프린터가 가능, Print All(all layer 가 한 장씩에 PRINT됨,)

   - 원하는 Layer만 모아서 한 장에 프린너하기, Edit/Insert printout/설정 Layer..

 Going from SCH to PCB

So now I have a schematic. How do I make a PCB layout?

1. Make your schematic in SCH. For help on how to do this, see the schematic tutorial.

2. In the old versions of Protel, you had to go through an intermediate step known as a netlist. All of that is hidden now, though people who want can still use them.

3. In SCH, Go to Design -> Update PCB... You may be asked to associate a PCB file with this schematic.  Eventually, the Update Design window will appear.  Click Execute.  If it warns you about that it cannot execute all of the netlist, click no and look at the warnings to determine the cause. Common warnings are:

• Footprint not found in library. A footprint is a code which specifies the physical size and shape of the component, which is needed to make a layout.
  Possible cause 1: the component specified does not have a footprint in the shematic. To check this, go back to SCH and double-click the component. In the popup window, see if there is anything in the "footprint" label. If it is empty, you will need to manually assign a footprint. Zoe has made a helpful table of footprints to help you decide what to assign. Tip: You may want to assign the footprints globally, if you have a lot of similar identical components, rather than assigning a footprint to each component individually. To do this, double-click on the component to bring up its properties.  Click on the "global" button.   In the new window that pops up, copy the Lib Ref into the Lib Ref under "Attributes to match by".  Then under "Copy attributes", copy in the footprint.  Click here to see an example of this in action.
  Possible cause 2: The footprint specified is not in one of the libraries loaded on PCB. Check what the footprint is specified in SCH, and then look in the components list of each library you have loaded in PCB to see if it is there. If not, choose another footprint or try to find a library containing the one you want. Click here for instructions on installing libraries.

• Component not found. In my case, this problem was caused by improper naming of the components in SCH. When you place a component in SCH, it adds a label (e.g. "CAP"). You can then add a Lib Ref (e.g. "C3"), which will appear above it in the schematic and be used by the netlist maker to identify parts. Make sure there are no spaces in the designation. For example, if you designate something as "R1 10K", it will think there are two component: R1 and R1 10K, and basically get confused.  If you want to put more details about something on the schematic, you can put it in the "Part Type" section of the properties.  Click here to see an example of the errors generated.

• Node not found. This means something is wrong with the connection on the component named. Causes: 1) using lines instead of wires for connections. 2) the wire overlaps the component. One indication of this is a red junction circle right next to the component.  To check, go into SCH, zoom way in on the offending connection, and click on the wire. You will be able to see if it extends past the end of the component. Click here to see an example. If so, you can either delete it and redraw, or click quickly on the end of the line until the cursor turns into a thin cross, and drag the end to its new place.